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CY7C1148KV18

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CY7C1150KV18: 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) Datasheet

Manufacturer: Infineon
Datasheet: 29 pages · 771 KB
Website: www.infineon.com

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Datasheet

CY7C1148KV18, CY7C1150KV18: 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) Datasheet
29 pages771 KB BookmarkedINFINEON-CY7C1148KV18.pdf

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