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CY7C1268KV18

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/CY7C1270KV18, 36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)

Manufacturer: Infineon
Datasheet: 29 pages · 805 KB
Website: www.infineon.com

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Technical Documents

1 document

Datasheet

CY7C1268KV18/CY7C1270KV18, 36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
29 pages805 KB BookmarkedINFINEON-CY7C1268KV18.pdf

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