UART baud rate error
USART divider register (BRR on STM32/GD32/AT32/CH32, UBRR on AVR) and the real baud rate error for a peripheral clock.
RegisterBRR=0x271
Actual baud115200 bps
Error0.000%
| Baud rate | Register | Actual baud | Error |
|---|---|---|---|
| 1200 | BRR=0xEA60 | 1200 | 0.00% |
| 2400 | BRR=0x7530 | 2400 | 0.00% |
| 4800 | BRR=0x3A98 | 4800 | 0.00% |
| 9600 | BRR=0x1D4C | 9600 | 0.00% |
| 19200 | BRR=0xEA6 | 19200 | 0.00% |
| 38400 | BRR=0x753 | 38400 | 0.00% |
| 57600 | BRR=0x4E2 | 57600 | 0.00% |
| 115200 | BRR=0x271 | 115200 | 0.00% |
| 230400 | BRR=0x139 | 230031.9 | -0.16% |
| 460800 | BRR=0x9C | 461538.5 | +0.16% |
| 921600 | BRR=0x4E | 923076.9 | +0.16% |
| 1000000 | BRR=0x48 | 1000000 | 0.00% |
| 2000000 | BRR=0x24 | 2000000 | 0.00% |
Common rates at 72 MHz. Keep the combined error of both ends under ±2%, ideally ±1% per side.
Results are for design reference only. Check the datasheet and measure.