Single Non‐Inverting Buffer with Open Drain Output

NPN Low‐Saturation Transistor

Advanced DDR memory termination power with shutdown

DDR memory termination regulator with standby mode and enhanced efficiency

14.318–150 MHz I2C 1:18 clock buffer

533 MHz I2C 1:6 clock buffer

_1, 0–300 MHz I 2 C 1:18 clock buffer

0–300 MHz I 2 C 1:10 clock buffer

533 MHz PCI-X clock buffer