[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"part:st:STL320N4LF8":3},{"part":4,"mfr":19,"docs":25,"aliases":34,"alts":35,"breadcrumbs":36,"related":42,"more_from_mfr":46},{"id":5,"pn":6,"pn_norm":6,"series":7,"package":8,"lifecycle":9,"summary":10,"params":11,"features":14,"pins":7,"updated_at":15,"category_name":16,"category_name_en":17,"category_path":18},4111,"STL320N4LF8",null,"POWERFLAT5X6","active","N-channel enhancement mode logic level 40 V, 0.8 mΩ max., 360 A, STripFET F8 Power MOSFET in a PowerFLAT 5x6 package",[12],[13,8],"封装",[],"2026-10-10T13:01:01.608Z","逻辑门 \u002F 触发器","Logic Gates \u002F Flip-Flops","logic.gate",{"slug":20,"name_en":21,"name_cn":22,"website":23,"is_domestic":24},"st","STMicroelectronics","意法半导体","https:\u002F\u002Fwww.st.com",false,[26],{"id":5,"filename":27,"title":28,"pages":29,"size_bytes":30,"lang":7,"doc_version":7,"published_at":7,"role":31,"outline_count":32,"thumb":33},"ST-STL320N4LF8.pdf","Datasheet - STL320N4LF8 - N-channel enhancement mode logic level 40 V, 0.8 mΩ max., 360 A, STripFET F8 Power MOSFET in a PowerFLAT 5x6 package",16,627135,"datasheet",8,"\u002Fthumbs\u002Fa6\u002F2f\u002Fa62fc82eb9953cfd3f47464608f2fead20cb3a6e0e0805f0fd77f9b43c507704.jpg",[],[],[37,41],{"name":38,"name_en":39,"path":40},"逻辑 \u002F 模拟开关","Logic \u002F Analog Switches","logic",{"name":16,"name_en":17,"path":18},[43],{"pn_display":44,"pn_norm":44,"package":8,"summary":45},"STL320N4F8","N‑channel 40 V, 0.85 mΩ max., 350 A STripFET F8 Power MOSFET in a PowerFLAT 5x6 package",[47,50,53,56,59,62,65,68,71,74,77,80],{"pn_display":48,"pn_norm":48,"summary":49},"74LCX00","Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs",{"pn_display":51,"pn_norm":51,"summary":52},"54VCXH162374","Rad hard low voltage CMOS 16-bit d-type latch (3-state)",{"pn_display":54,"pn_norm":54,"summary":55},"54VCXH162373","Rad hard low voltage CMOS 16-bit D-type latch (3-state)",{"pn_display":57,"pn_norm":57,"summary":58},"74LVX20","Low voltage CMOS dual 4-input NAND gate with 5 V tolerant inputs",{"pn_display":60,"pn_norm":60,"summary":61},"74ALVCH16374","Low voltage CMOS 16-bit D-type flip-flop (3-state) with 3.6V tolerant inputs and outputs",{"pn_display":63,"pn_norm":63,"summary":64},"74LCX02","Low voltage CMOS quad 2-input NOR gate with 5 V tolerant inputs",{"pn_display":66,"pn_norm":66,"summary":67},"74LCX04","Low voltage CMOS hex inverter with 5 V tolerant inputs",{"pn_display":69,"pn_norm":69,"summary":70},"74LCX138","Low voltage CMOS 3 to 8 line decoder (inverter) with 5 V tolerant inputs",{"pn_display":72,"pn_norm":72,"summary":73},"74LCX14","Low voltage CMOS hex Schmitt inverter with 5 V tolerant inputs",{"pn_display":75,"pn_norm":75,"summary":76},"74LCX32","Low voltage CMOS 2-input OR gate with 5 V tolerant inputs",{"pn_display":78,"pn_norm":78,"summary":79},"74LCX373","Octal D-type latch non-inverting (3-state) with 5V tolerant inputs and outputs",{"pn_display":81,"pn_norm":81,"summary":82},"74LCX374","Octal D-type flip flop non-inverting (3-state) with 5V tolerant inputs and outputs"]