[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"part:nxp:GTL2034":3},{"part":4,"mfr":22,"docs":28,"aliases":36,"alts":42,"breadcrumbs":43,"related":49,"more_from_mfr":92},{"id":5,"pn":6,"pn_norm":6,"series":7,"package":8,"lifecycle":9,"summary":10,"params":11,"features":17,"pins":7,"updated_at":18,"category_name":19,"category_name_en":20,"category_path":21},11937,"GTL2034",null,"TSSOP14","active","4-bit GTL to GTL buffer",[12,15],[13,14],"工作温度","-40 ~ 85 °C",[16,8],"封装",[],"2026-10-10T13:01:01.608Z","电平转换 \u002F 缓冲","Level Translators \u002F Buffers","logic.level",{"slug":23,"name_en":24,"name_cn":25,"website":26,"is_domestic":27},"nxp","NXP","恩智浦","https:\u002F\u002Fwww.nxp.com",false,[29],{"id":5,"filename":30,"title":10,"pages":31,"size_bytes":32,"lang":7,"doc_version":7,"published_at":7,"role":33,"outline_count":34,"thumb":35},"NXP-GTL2034.pdf",14,261800,"datasheet",30,"\u002Fthumbs\u002Fc6\u002Fa4\u002Fc6a47f56f446303c061446ce2fc9548c5148e99a1651291b27a127630aa94496.jpg",[37,40],{"alias_norm":38,"kind":39},"GTL2034PW","order",{"alias_norm":41,"kind":39},"GTL2034PWZ",[],[44,48],{"name":45,"name_en":46,"path":47},"逻辑 \u002F 模拟开关","Logic \u002F Analog Switches","logic",{"name":19,"name_en":20,"path":21},[50,54,58,62,65,69,72,75,79,83,86,89],{"pn_display":51,"pn_norm":51,"package":52,"summary":53},"GTL2000","SSOP48","22-bit bi-directional low voltage translator",{"pn_display":55,"pn_norm":55,"package":56,"summary":57},"GTL2002","SO8","2-bit bidirectional low voltage translator",{"pn_display":59,"pn_norm":59,"package":60,"summary":61},"GTL2003","TSSOP20","8-bit bidirectional low voltage translator",{"pn_display":63,"pn_norm":63,"package":8,"summary":64},"GTL2005","Quad GTL\u002FGTL+ to LVTTL\u002FTTL bidirectional non-latched translator",{"pn_display":66,"pn_norm":66,"package":67,"summary":68},"GTL2006","TSSOP28","13-bit GTL–\u002FGTL\u002FGTL+ to LVTTL translator",{"pn_display":70,"pn_norm":70,"package":67,"summary":71},"GTL2007","12-bit GTL to LVTTL translator with power good control",{"pn_display":73,"pn_norm":73,"package":7,"summary":74},"GTL2008","12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs",{"pn_display":76,"pn_norm":76,"package":77,"summary":78},"GTL2010","TSSOP24","10-bit bidirectional low voltage translator",{"pn_display":80,"pn_norm":80,"package":81,"summary":82},"GTL2012","TSSOP8","2-bit LVTTL to GTL transceiver",{"pn_display":84,"pn_norm":84,"package":8,"summary":85},"GTL2014","4-bit LVTTL to GTL transceiver",{"pn_display":87,"pn_norm":87,"package":77,"summary":88},"GTL2018","8-bit LVTTL to GTL transceiver",{"pn_display":90,"pn_norm":90,"package":67,"summary":91},"GTL2107","12-bit GTL−\u002FGTL\u002FGTL+ to LVTTL translator",[93,96,99,101,104,107,110,113],{"pn_display":94,"pn_norm":94,"summary":95},"PCK2002P","533 MHz PCI-X clock buffer",{"pn_display":97,"pn_norm":97,"summary":98},"P3S0210BQ","Dual bidirectional I3C-bus, 1:2 and 2:1 switch, and voltage data sheet",{"pn_display":100,"pn_norm":100,"summary":95},"PCK2002PL",{"pn_display":102,"pn_norm":102,"summary":103},"SSTU32864","1.8 V configurable registered buffer for DDR2 RDIMM applications",{"pn_display":105,"pn_norm":105,"summary":106},"SSTUA32864","1.8 V configurable registered buffer for DDR2-667 RDIMM applications",{"pn_display":108,"pn_norm":108,"summary":109},"SSTUB32868","1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications",{"pn_display":111,"pn_norm":111,"summary":112},"SSTUG32866","1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications",{"pn_display":114,"pn_norm":114,"summary":115},"TDA3618JR","Multiple voltage regulator with switch and ignition buffers"]