[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"part:st:74LCX74":3},{"part":4,"mfr":19,"docs":25,"aliases":33,"alts":34,"breadcrumbs":35,"related":41,"more_from_mfr":94},{"id":5,"pn":6,"pn_norm":6,"series":7,"package":8,"lifecycle":9,"summary":10,"params":11,"features":14,"pins":7,"updated_at":15,"category_name":16,"category_name_en":17,"category_path":18},541,"74LCX74",null,"SO-14","active","Low voltage CMOS dual D-type flip flop with 5 V tolerant inputs",[12],[13,8],"封装",[],"2026-10-10T13:01:01.608Z","逻辑门 \u002F 触发器","Logic Gates \u002F Flip-Flops","logic.gate",{"slug":20,"name_en":21,"name_cn":22,"website":23,"is_domestic":24},"st","STMicroelectronics","意法半导体","https:\u002F\u002Fwww.st.com",false,[26],{"id":5,"filename":27,"title":10,"pages":28,"size_bytes":29,"lang":7,"doc_version":7,"published_at":7,"role":30,"outline_count":31,"thumb":32},"ST-74LCX74.pdf",17,449236,"datasheet",22,"\u002Fthumbs\u002F04\u002Fea\u002F04ea92ba143674d6bc96b51f177f8effd67e2bc9d89f761958a51d1eff4b9eaa.jpg",[],[],[36,40],{"name":37,"name_en":38,"path":39},"逻辑 \u002F 模拟开关","Logic \u002F Analog Switches","logic",{"name":16,"name_en":17,"path":18},[42,45,48,51,54,58,62,65,68,71,74,77,80,83,87,89,91],{"pn_display":43,"pn_norm":43,"package":8,"summary":44},"74LCX00","Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs",{"pn_display":46,"pn_norm":46,"package":8,"summary":47},"74LCX02","Low voltage CMOS quad 2-input NOR gate with 5 V tolerant inputs",{"pn_display":49,"pn_norm":49,"package":8,"summary":50},"74LCX04","Low voltage CMOS hex inverter with 5 V tolerant inputs",{"pn_display":52,"pn_norm":52,"package":8,"summary":53},"74LCX07","Low-voltage CMOS hex buffer (open drain) with 5 V tolerant inputs",{"pn_display":55,"pn_norm":55,"package":56,"summary":57},"74LCX125","TSSOP14","Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs",{"pn_display":59,"pn_norm":59,"package":60,"summary":61},"74LCX138","SO-16","Low voltage CMOS 3 to 8 line decoder (inverter) with 5 V tolerant inputs",{"pn_display":63,"pn_norm":63,"package":60,"summary":64},"74LCX139","Low voltage CMOS dual 2 to 4 decoder \u002F demultiplexer",{"pn_display":66,"pn_norm":66,"package":8,"summary":67},"74LCX14","Low voltage CMOS hex Schmitt inverter with 5 V tolerant inputs",{"pn_display":69,"pn_norm":69,"package":60,"summary":70},"74LCX157","Low voltage CMOS Quad 2 channel multiplexer with 5V tolerant inputs",{"pn_display":72,"pn_norm":72,"package":7,"summary":73},"74LCX257","Low voltage CMOS quad 2 channel multiplexer with 5V tolerant inputs and outputs (3-state)",{"pn_display":75,"pn_norm":75,"package":8,"summary":76},"74LCX32","Low voltage CMOS 2-input OR gate with 5 V tolerant inputs",{"pn_display":78,"pn_norm":78,"package":7,"summary":79},"74LCX373","Octal D-type latch non-inverting (3-state) with 5V tolerant inputs and outputs",{"pn_display":81,"pn_norm":81,"package":7,"summary":82},"74LCX374","Octal D-type flip flop non-inverting (3-state) with 5V tolerant inputs and outputs",{"pn_display":84,"pn_norm":84,"package":85,"summary":86},"74LCX541","SO-20","Low voltage CMOS octal bus buffer (3-state) with 5V tolerant inputs and outputs",{"pn_display":88,"pn_norm":88,"package":7,"summary":79},"74LCX573",{"pn_display":90,"pn_norm":90,"package":7,"summary":82},"74LCX574",{"pn_display":92,"pn_norm":92,"package":8,"summary":93},"74LCX86","Low voltage CMOS quad exclusive OR gate with 5 V tolerant inputs",[95,98,101,104],{"pn_display":96,"pn_norm":96,"summary":97},"54VCXH162374","Rad hard low voltage CMOS 16-bit d-type latch (3-state)",{"pn_display":99,"pn_norm":99,"summary":100},"74LVC00A","Low voltage CMOS quad 2-input NAND gate high performance",{"pn_display":102,"pn_norm":102,"summary":103},"54VCXH162373","Rad hard low voltage CMOS 16-bit D-type latch (3-state)",{"pn_display":105,"pn_norm":105,"summary":106},"74ALVCH16374","Low voltage CMOS 16-bit D-type flip-flop (3-state) with 3.6V tolerant inputs and outputs"]