[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"part:nxp:GTL2005":3},{"part":4,"mfr":22,"docs":28,"aliases":37,"alts":41,"breadcrumbs":42,"related":48,"more_from_mfr":91},{"id":5,"pn":6,"pn_norm":6,"series":7,"package":8,"lifecycle":9,"summary":10,"params":11,"features":17,"pins":7,"updated_at":18,"category_name":19,"category_name_en":20,"category_path":21},11929,"GTL2005",null,"TSSOP14","active","Quad GTL\u002FGTL+ to LVTTL\u002FTTL bidirectional non-latched translator",[12,15],[13,14],"工作温度","-40 ~ 85 °C",[16,8],"封装",[],"2026-10-10T13:01:01.608Z","电平转换 \u002F 缓冲","Level Translators \u002F Buffers","logic.level",{"slug":23,"name_en":24,"name_cn":25,"website":26,"is_domestic":27},"nxp","NXP","恩智浦","https:\u002F\u002Fwww.nxp.com",false,[29],{"id":5,"filename":30,"title":31,"pages":32,"size_bytes":33,"lang":7,"doc_version":7,"published_at":7,"role":34,"outline_count":35,"thumb":36},"NXP-GTL2005.pdf","GTL2005 Quad GTL\u002FGTL+ to LVTTL\u002FTTL bidirectional non-latched translator",19,119759,"datasheet",32,"\u002Fthumbs\u002Ff4\u002Fb8\u002Ff4b83629c27d2ff21022c086413564a1aae5cafa316e66e4420950d63f1d7bbd.jpg",[38],{"alias_norm":39,"kind":40},"GTL2005PW","order",[],[43,47],{"name":44,"name_en":45,"path":46},"逻辑 \u002F 模拟开关","Logic \u002F Analog Switches","logic",{"name":19,"name_en":20,"path":21},[49,53,57,61,65,68,71,75,79,82,85,88],{"pn_display":50,"pn_norm":50,"package":51,"summary":52},"GTL2000","SSOP48","22-bit bi-directional low voltage translator",{"pn_display":54,"pn_norm":54,"package":55,"summary":56},"GTL2002","SO8","2-bit bidirectional low voltage translator",{"pn_display":58,"pn_norm":58,"package":59,"summary":60},"GTL2003","TSSOP20","8-bit bidirectional low voltage translator",{"pn_display":62,"pn_norm":62,"package":63,"summary":64},"GTL2006","TSSOP28","13-bit GTL–\u002FGTL\u002FGTL+ to LVTTL translator",{"pn_display":66,"pn_norm":66,"package":63,"summary":67},"GTL2007","12-bit GTL to LVTTL translator with power good control",{"pn_display":69,"pn_norm":69,"package":7,"summary":70},"GTL2008","12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs",{"pn_display":72,"pn_norm":72,"package":73,"summary":74},"GTL2010","TSSOP24","10-bit bidirectional low voltage translator",{"pn_display":76,"pn_norm":76,"package":77,"summary":78},"GTL2012","TSSOP8","2-bit LVTTL to GTL transceiver",{"pn_display":80,"pn_norm":80,"package":8,"summary":81},"GTL2014","4-bit LVTTL to GTL transceiver",{"pn_display":83,"pn_norm":83,"package":73,"summary":84},"GTL2018","8-bit LVTTL to GTL transceiver",{"pn_display":86,"pn_norm":86,"package":8,"summary":87},"GTL2034","4-bit GTL to GTL buffer",{"pn_display":89,"pn_norm":89,"package":63,"summary":90},"GTL2107","12-bit GTL−\u002FGTL\u002FGTL+ to LVTTL translator",[92,95,98,101,104,106,109,112,115],{"pn_display":93,"pn_norm":93,"summary":94},"NTB0101","Q100 Dual supply translating transceiver; auto direction sensing; 3-state",{"pn_display":96,"pn_norm":96,"summary":97},"NTS0103","Dual supply translating transceiver; open drain; auto direction sensing",{"pn_display":99,"pn_norm":99,"summary":100},"PCA9601","Dual bidirectional bus buffer",{"pn_display":102,"pn_norm":102,"summary":103},"PCK2002P","533 MHz PCI-X clock buffer",{"pn_display":105,"pn_norm":105,"summary":103},"PCK2002PL",{"pn_display":107,"pn_norm":107,"summary":108},"SSTUA32864","1.8 V configurable registered buffer for DDR2-667 RDIMM applications",{"pn_display":110,"pn_norm":110,"summary":111},"SSTUG32865","1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-1G RDIMM applications",{"pn_display":113,"pn_norm":113,"summary":114},"SSTUH32865","1.8 V 28-bit high output drive 1:2 registered buffer with parity for DDR2 RDIMM applications",{"pn_display":116,"pn_norm":116,"summary":117},"TDA3618JR","Multiple voltage regulator with switch and ignition buffers"]