逻辑 / 模拟开关

Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs

Hex Inverter

Single 2-input NOR gate

Single buffer/driver with open drain

Low voltage CMOS single 2-input AND gate with 5 V tolerant input

Single bus buffer (3-state)

Single 2-input NAND gate

Single 2-input NOR gate

Single 2-input open drain NAND gate

Single 2-input AND gate

Single Schmitt inverter

Single positive edge triggered D-type flip-flop

Single buffer (open drain)

Single bus buffer (3-state)

16-bit dual supply bus transceiver level translator with a side series resistor

Snubberless, logic level and standard 8 A Triacs -

12 A Snubberless™, logic level and standard Triacs

10 A Snubberless™, logic level and standard Triacs

Rad-hard plastic quad 2-input NAND gate

Rad-hard plastic Hex inverter with Schmitt trigger input