逻辑 / 模拟开关

Single 2-input NOR gate

Single buffer/driver with open drain

Low voltage CMOS single 2-input AND gate with 5 V tolerant input

Single bus buffer (3-state)

Single 2-input NAND gate

Single 2-input NOR gate

Single 2-input open drain NAND gate

Single 2-input AND gate

Single Schmitt inverter

Single positive edge triggered D-type flip-flop

Single buffer (open drain)

Single bus buffer (3-state)

Low voltage high bandwidth dual single-pole double-throw analog

Snubberless, logic level and standard 8 A Triacs -

12 A Snubberless™, logic level and standard Triacs

10 A Snubberless™, logic level and standard Triacs

2-bit dual supply level translator without direction control pin

2-bit dual supply level translator without direction control pin, push-pull output

4-bit dual supply level translator without direction control pin

8-bit dual supply level translator without direction control pin