逻辑 / 模拟开关

Single 2-Input OR Gate

Single Non‐Inverting Buffer with Open Drain Output

Single 2‐Input AND Gate

Non‐Inverting 3‐State Buffer

Non‐Inverting 3‐State Buffer

Single Inverter with Schmitt Trigger

Single Input Buffer

Single Non‐Inverting Buffer with Schmitt Trigger

Single 2‐Input OR Gate

Ultra-Low THD Stereo SPDT Switch with Independent Channel Selects

MOSFET – Power, N‐Channel, Logic Level, SOT‐223 3.0 A, 60 V

MOSFET – Power, Single, N‐Channel, Logic Level, SOT‐23 60 V, 155 mΩ

MOSFET – Power, Single N‐Channel, Logic Level, SOT‐23 60 V, 155 mΩ

Dual N-channel dual gate MOS-FET

Auto direction sensing dual supply

Dual supply translating transceiver; auto direction sensing; 3-state

Dual supply translating transceiver; open drain; auto direction sensing

Dual supply translating transceiver; open-drain; auto direction sensing - data sheet

SIM card interface level translator and supply voltage - data sheet

SIM card interface level translator with EMI filter and ESD protection data sheet